1. Field of the Invention
The present invention relates to the field of oscillators. It can be applied in the field of electronic circuits that are supplied by a voltage, where it is necessary to produce a voltage greater than its supply voltage.
2. Description of the Related Art
A typical example of the application of a circuit using a voltage greater than its supply voltage is that of integrated circuits incorporating non-volatile memories that use floating-gate transistors. The programming of these memories requires a programming voltage (in the range of 18 volts) which is far greater than the normal supply voltage (typically ranging from 2 to 5 volts). So that the user may use this memory with only one external supply voltage, it is planned that the integrated circuit will possess internal means to produce the programming voltage from the supply voltage. The circuit that will produce the programming voltage is a high-voltage generator circuit whose principle is generally based on that of the xe2x80x9cload pumpxe2x80x9d.
The schematic diagram of the load pump is shown in FIG. 1. The load pump has a succession of stages of diodes D and capacitors C, with switches to switch over the connections of the capacitors between a supply voltage VCC and a ground according to two periodic driving signals, also called phases, FN, FX that are non-overlapping, as illustrated in FIGS. 3C and 3A, respectively. Each stage has two capacitors C, Cxe2x80x2 and two diodes D, Dxe2x80x2. In the first phase FN, the first capacitor C is charged at the supply voltage VCC. In the second phase FX, the first capacitor C is partially discharged into the second capacitor Cxe2x80x2. Then the first capacitor C is again charged. The diodes D, Dxe2x80x2 prevent the discharging of the second capacitor Cxe2x80x2 into the first capacitor C so that gradually this second capacitor Cxe2x80x2 will have the voltage at its terminals rise up to a value which, in theory, may attain 3*VCC (if one does not take account the voltage drops in the diodes). To obtain a higher voltage, n successive stages are series-connected. Accounting for the threshold voltage Vt of the diodes, the voltage obtained may be (n+1)*(VCCxe2x88x92Vt).
To obtain a sufficient value of output voltage without excessively increasing the number of stages, it has already been proposed to limit the losses by replacing the diodes D and Dxe2x80x2 with transistors T, Txe2x80x2 that do not create a voltage drop at their terminals when they are conductive. The diagram that may result therefrom is shown in FIG. 2. Since the transistors also have a threshold voltage Vt, it is planned that certain transistors will have their control gate controlled by a voltage level greater, by at least the value Vt, than the voltage that they should let through. Thus, with n load pump stages, there is obtained an output voltage which may reach (n+1)*VCC. This value is more advantageous than in the aforementioned diode circuits.
In practice, the diagram of the load pump of FIG. 2 shows two pairs of driving signals or phases. These are, firstly, FN and FX as in FIG. 1, switching over between two voltage levels 0 and VCC and, secondly, FBN and FBX which are respectively synchronized with FN and FX but which switch over between two voltage levels 0 and Vb (the signals FBX and FBN are illustrated in FIGS. 3B and 3D) where Vb is the highest possible voltage level (which will depend on the number of stages, and more specifically on the maximum voltage that has to flow through the transistors). However, care must be taken to limit the value of Vb so as not to disrupt the gate oxides of the transistors. The signals FBN and FBX are generally produced from the signals FN and FX, by using the charge of the capacitors to artificially raise (i.e. to bootstrap) the level VCC and reach the level Vb. The signals are then called bootstrapped signals.
The European patent application 0 591 022 A1 describes a load pump of this kind.
One solution for producing such non-overlapping phases uses an oscillator that produces a basic clock signal. It is possible to use a ring oscillator, typically formed by looped logic gates or an RC type relaxation oscillator. The basic signal is used to produce non-overlapping phases, generally by using sets of looped logic gates (these gates, in the ring oscillators, could be integrated into the loop producing the basic signal). In practice, however, it is difficult with a system of this kind to obtain appropriate symmetry and to guarantee non-overlapping of the phases produced. Additionally, in practice, phases with different duty cycles are produced, and a partial overlapping of the phases, or at least a margin of non-overlapping that is small, can be seen. In certain cases, the production of the phases or the production of unusable phases is stopped, since their duty cycles or their margin of non-overlapping is not suited to the application being sought. Finally, this type of circuit generally requires a large number of components and therefore raises a problem of space requirements and power consumption.
When a load pump is used, it is always useful to ensure that the voltage produced reaches the desired value as fast as possible. In other words, it is necessary to produce phases having the highest possible frequency, since it is the frequency of the phases that conditions the build-up time of the pump.
One problem with this type of circuit is that the oscillation frequency is a direct function of the value of the supply voltage. Indeed, the production of the phases is typically obtained by means of logic gates whose switch-over time is a function of their supply voltage. Now, there is a growing trend towards the designing of circuits that can be used with a supply voltage that is within a certain range, for example between 1.5 (or less) and 5.0 volts and no longer with a given supply voltage. To the minimum supply voltage there will correspond the lowest frequency of the pump. To the maximum supply voltage there will correspond the highest frequency of the pump. It would be difficult to obtain a compromise providing for minimum frequency of appreciable value while at the same time avoiding an excessively high maximum frequency and preventing a situation where the circuit shows, for example, problems of electromagnetic radiation.
One solution includes producing the phases by means of an external clock signal with a stable frequency that is independent of the variations in the supply voltage. In this case, problems of radiation, if any, will be averted but it will be necessary to set the frequency as a function of the minimum supply voltage. Indeed, the minimum supply voltage corresponds to the slowest sequencing of the phases. If the frequency of the external oscillator is higher than the permissible limit so that the phases may be accurately sequenced, then the system will xe2x80x9cstallxe2x80x9d, in other words, it will become desynchronized and stop functioning. Hence, the build-up time of the pump will be limited for higher supply voltages that would enable operation at a higher phase-sequencing frequency.
Another approach is to provide for a load pump diagram by which it is possible not to limit the phase sequencing frequency to its maximum permissible value at minimum supply voltage, while at the same time limiting this frequency from a given supply voltage threshold value onwards. For low supply voltages, the frequency increases with the supply voltage. In other words, it is the inherent phase sequencing speed that conditions the frequency of the pump. Starting from a given supply voltage threshold, the frequency is limited to a given value. The frequency of the pump is then independent of the supply voltage and it is the inherent frequency of a relaxation oscillator that conditions the sequencing of the phases.
The present invention is aimed at providing an oscillator that enables the production of non-overlapping phases of the same frequency and that can provide for improved symmetry and an improved margin of non-overlapping.
Another aim of the present invention is to provide an oscillator that is improved from the viewpoint of space requirements and power consumption.
Another aim of the present invention is to provide an oscillator comprising means to control the frequency of the phases produced.
Thus, the present invention relates to an oscillator producing first oscillating logic signals that are of the same frequency and are non-overlapping in a first logic state. This oscillator comprises a flip-flop circuit to produce second oscillating logic signals of opposite polarities, the flip-flop circuit being driven by first and second driving logic signals. First and second logic gates receive the third and fourth logic signals and produce the first and second logic signals, the logic state transitions in the first and second logic signals being produced as a function of the logic state transitions of the third and fourth logic signals. The first and second logic gates are organized so as to introduce a delay into the transitions, from a second logic state to the first logic state, in the first and second logic signals with respect to transitions in the third and fourth logic signals. First and second RC type circuits produce the first and second driving signals to control the transitions in the third and fourth logic signals.
According to one embodiment, the first and second logic gates producing the first and second logic signals are Schmitt triggers receiving the third and fourth logic signals.
According to one embodiment, the first and second RC type circuits are integrators producing voltages from one of the first and second logic signals, and third logic gates that are sensitive to the values of these voltages produce one of the first and second driving signals, the logic states of these driving signals representing values of the voltages produced.
According to one embodiment, the third logic gates are controlled by control signals enabling changes in logic state in the first and second driving signals to be delayed.
According to one embodiment, the RC type circuits have different time constants so as to produce first and second logic signals having different duty cycles.
The present invention also relates to a switch-over control circuit for a load pump type of high-voltage generator, wherein said circuit comprises, firstly, an oscillator as defined here above, the oscillator producing first and second logic signals and, secondly, output stages receiving the first and second logic signals and repetitively producing first and second driving phases from these first signals.
According to one embodiment, the first and second output stages each produces control signals, the oscillator receiving these control signals and comprising means to control the frequency of the first logic signals so that the frequency of these signals is the smaller of a fixed frequency and a frequency that is variable depending on the driving phases.
According to one embodiment, with the output stages producing first and second non-overlapping driving phases in a first logic state, these first and second driving phases are produced by means of flip-flop circuits driven -by the first and second logic signals.
According to one embodiment, the first and second driving phases are produced by first and second inverters that are cascade-connected respectively, with the first and second flip-flop circuits, each of these inverters being formed by transistors whose channels are series-connected with resistors so as to limit the current flowing through these channels during switch-over phases.
According to one embodiment, the output stages each comprises potential bootstrap circuits to produce respectively, third and fourth driving phases forming, with the first and second driving phases, two pairs of driving phases, the third and fourth phases being produced by bootstrapping the potential corresponding to the first logic state of the first phases and the second phases being used to control the resetting of the flip-flop circuits producing the first and second driving phases.
According to one embodiment, each potential bootstrap circuit comprises at least two cascade-connected potential translator circuits and one precharging circuit, the potential translator circuits producing respectively the third and fourth driving phases by means of capacitors, these capacitors giving a supply potential to supply inputs of said translator circuits, said capacitors being precharged by the precharging circuit during precharging phases and the potentials at the terminals of these capacitors being bootstrapped during bootstrapping phases, and the first translator circuit playing a part in the bootstrapping the potentials of the capacitor supplying the second logic potential translator circuit.
According to one embodiment, the potential translator circuits each produce a potential logic signal from a logic potential bootstrapped received at a control input and the cascade-connected potential translator circuits are driven by one and the same control signal so that the bootstrapped potential signal produced by the second translator circuit is bootstrapped gradually during the bootstrapping phases.
According to one embodiment, the precharging circuit comprises means for the limiting, to a maximum value, during the precharging phases, of the supply potential given to the supply inputs of the potential translator circuits.
According to one embodiment, the precharging circuit comprises transistors and means to control these transistors so as to take the supply potentials of the potential translator circuits, during the precharging phases, to a first value in precharging the capacitors that supply said circuits, and so as to insulate these capacitors, during the bootstrapping phases, from the precharging circuit so as to prevent the discharging of these capacitors into the precharging circuit.